General information

  • L. Jóźwiak and M. Lindwer (Poster)
    "Automatic Architecture Synthesis and Application Mapping",
    presented a. o. at the ARTEMIS & ITEA Co-summit 2010, Co-organized by ARTEMIS Joint Undertaking and EUREKA R&D Platform, Ghent, Belgium, 26-27 October, 2010, and at Embedded Systems Institute Symposium, Eindhoven, 2 December 2010.
    pdf
  • L. Jóźwiak and M. Lindwer (Leaflet)
    "Automatic Architecture Synthesis and Application Mapping",
    distributed a. o. at the ARTEMIS & ITEA Co-summit 2010, Co-organized by ARTEMIS Joint Undertaking and EUREKA R&D Platform, Ghent, Belgium, 26-27 October, 2010 and at Embedded Systems Institute Symposium, Eindhoven, 2 December 2010.
    pdf
  • L. Jóźwiak and M. Lindwer (Presentation)
    "Automatic Architecture Synthesis and Application Mapping",
    PowerPoint Presentation, ARTEMIS & ITEA Co-summit 2010, Co-organized by ARTEMIS Joint Undertaking and EUREKA R&D Platform, Ghent, Belgium, 26-27 October, 2010.
    pdf

Journal Articles

2014

  1. Diken, E.; Jordans, R.; Corvino, R.; Jóźwiak, L.; Corporaal, H. and Chies, F. A.: Construction and Exploitation of VLIW ASIPs with Heterogeneous Vector-Widths. In Microprocessors and Microsystems, 38 (8-B): 947-959, 2014. BibTeX

2013

  1. Jordans, R.; Corvino, R.; Jóźwiak, L. and Corporaal, H.: Exploring processor parallelism: Estimation methods and optimization strategies. In International Journal of Microelectronics and Computer Science, 4 (2): 55-64, 2013. pdf  BibTeX
  2. Derin, O.; Cannella, E.; Tuveri, G.; Meloni, P.; Stefanov, T.; Fiorin, L.; Raffo, L. and Sami, M.: A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project. In Microprocessors and Microsystems, 37 (6-7): 515-529, 2013. pdf  doi  BibTeX
  3. Jozwiak, L.; Lindwer, M.; Corvino, R.; Meloni, P.; Micconi, L.; Madsen, J.; Diken, E.; Gangadharan, D.; Jordans, R.; Pomata, S.; Pop, P.; Tuveri, G.; Raffo, L. and Notarangelo, G.: ASAM: Automatic architecture synthesis and application mapping. In Microprocessors and Microsystems, 37 (8): 1002-1019, 2013. pdf  doi  BibTeX

2012

  1. Canella, A. E.; Derin, O.; Meloni, P.; Tuveri, G. and Stefanov, T.: Adaptivity Support for MPSoCs based on Process Migration in Polyhedral Process Networks. In VLSI Design Journal, 2012: 1-17, 2012. pdf  BibTeX
  2. Nery, A. S.; Jóźwiak, L.; Lindwer, M.; Cocco, M.; Nedjah, N. and França, F.: Hardware reuse in modern application-specific processors and accelerators. In Journal of Microprocessors and Microsystems, 2012: 1-9, 2012. pdf  BibTeX
  3. Jan, Y. and Jóźwiak, L.: Communication and Memory Architecture Design of Application-Specific High-End Multiprocessors. In VLSI Design Journal, 2012: 1-20, 2012. pdf  BibTeX
  4. Meloni, P.; Pomata, S.; Tuveri, G.; Secchi, S.; Raffo, L. and Lindwer, M.: Enabling fast ASIP design space exploration: an FPGA-based runtime reconfigurable prototyper. In VLSI Design Journal, 2012: 1-16, 2012. pdf  BibTeX

Book Chapters

2011

  1. Corvino, R.; Gamatié, A. and Boulet, P.: Design Space Exploration for Efficient Data Intensive Computing on SoCs. In Handbook of Data Intensive Computing, pages 581-616, Springer, Berlin, 2011. BibTeX

In Conference Proceedings

2014

  1. Diken, E.; Jordans, R.; Jóźwiak, L. and Corporaal, H.: Construction and Exploitation of VLIW ASIPs with Multiple Vector-Widths. In MECO 2014 - 3rd Mediterranean Conference on Embedded Computing, pages 244-247, 2014. pdf  doi  BibTeX
  2. Jordans, R.; Jóźwiak, L. and Corporaal, H.: Instruction-set Architecture Exploration of VLIW ASIPs Using a Genetic Algorithm. In MECO 2014 - 3rd Mediterranean Conference on Embedded Computing, pages 32-35, 2014. pdf  doi  BibTeX
  3. Jordans, R.; Diken, E.; Jóźwiak, L. and Corporaal, H.: BuildMaster: Efficient ASIP Architecture Exploration Through Compilation and Simulation Result Caching. In DDECS 2014 - 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2014. pdf  BibTeX

2013

  1. Tuveri, G.; Secchi, S.; Meloni, P.; Raffo, L. and Cannella, E.: A runtime adaptive H.264 video-decoding MPSoC platform. In Design and Architectures for Signal and Image Processing (DASIP), 2013 Conference on, pages 149-156, 2013. BibTeX
  2. Jordans, R.; Corvino, R.; Jóźwiak, L. and Corporaal, H.: An Efficient Method for Energy Estimation of Application Specific Instruction-set Processors. In DSD 2013 - 16th Euromicro Conference on Digital System Design, pages 471-474, Santander, Spain, 2013. pdf  doi  BibTeX
  3. Gangadharan, D.; Micconi, L.; Pop, P. and Madsen, J.: Multi-ASIP Platform Synthesis for Event-Triggered Applications with Cost/Performance Trade-offs. In IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, Taipei, Taiwan, 2013. BibTeX
  4. Micconi, L.; Gangadharan, D.; Pop, P. and Madsen, J.: Multi-ASIP platform synthesis for real-time applications. In SIES 2013 - 8th IEEE International Symposium on Industrial Embedded Systems, Porto, Portugal, 2013. doi  BibTeX
  5. Diken, E.; Corvino, R. and Jóźwiak, L.: Rapid and Accurate Energy Estimation of Vector Processing in VLIW ASIPs. In ECyPS 2013 - EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems, pages 33-37, Budva, Montenegro, 2013. pdf  doi  BibTeX
  6. Jordans, R.; Corvino, R.; Jóźwiak, L. and Corporaal, H.: Instruction-set Architecture Exploration Strategies for Deeply Clustered VLIW ASIPs. In ECyPS 2013 - EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems, pages 38-41, Budva, Montenegro, 2013. pdf  doi  BibTeX
  7. Micconi, L.; Corvino, R.; Gangadharan, D.; Madsen, J.; Pop, P. and Jóźwiak, L.: Hierarchical DSE for multi-ASIP platforms. In ECyPS 2013 - EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems, pages 50-53, Budva, Montenegro, 2013. Recieved best paper award. doi  BibTeX
  8. Jordans, R.; Corvino, R.; Jóźwiak, L. and Corporaal, H.: Exploring Processor Parallelism: Estimation Methods and Optimization Strategies. In DDECS 2013 - 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, pages 18-23, Karlovy Vary, Czech Republic, 2013. Recieved best paper award. pdf  doi  BibTeX
  9. Lindwer, M. and Pedersen, M. R.: High-performance imaging subsystems and their integration in mobile devices. In Proceedings of the Conference on Design, Automation and Test in Europe, pages 170-170, EDA Consortium, San Jose, CA, USA, DATE '13 , 2013. pdf  BibTeX

2012

  1. Corvino, R.; Diken, E.; Gamatié, A. and Jóźwiak, L.: Transformation based exploration of data parallel architecture for customizable hardware: A JPEG encoder case study. In DSD 2012 - 15th Euromicro Conference on Digital System Design, pages 774-781, Cesme, Izmir, Turkey, 2012. pdf  doi  BibTeX
  2. Jordans, R.; Corvino, R. and Jóźwiak, L.: Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW Processors. In DSD 2012 - 15th Euromicro Conference on Digital System Design, pages 152-155, Cesme, Izmir, Turkey, 2012. pdf  doi  BibTeX
  3. Jóźwiak, L.; Lindwer, M.; Corvino, R.; Meloni, P.; Micconi, L.; Madsen, J.; Diken, E.; Gangadharan, D.; Jordans, R.; Pomata, S.; Pop, P.; Tuveri, G. and Raffo, L.: ASAM: Automatic Architecture Synthesis and Application Mapping. In DSD 2012 - 15th Euromicro Conference on Digital System Design, pages 216-225, Cesme, Izmir, Turkey, 2012. pdf  doi  BibTeX
  4. Meloni, P.; Tuveri, G.; Raffo, L.; Cannella, E.; Stefanov, T.; Derin, O.; Fiorin, L. and Sami, M.: System Adaptivity and Fault-Tolerance in NoC-based MPSoCs: The MADNESS Project Approach. In DSD 2012 - 15th Euromicro Conference on Digital System Design, pages 517-524, Cesme, Izmir, Turkey, 2012. BibTeX
  5. Corvino, R.; Gamatié, A.; Geilen, M. and Jóźwiak, L.: Design space exploration in application-specific hardware synthesis for multiple communicating nested loops. In SAMOS XII - 12th International Conference on Embedded Computer Systems, pages 1-8, Samos, Greece, 2012. pdf  doi  BibTeX
  6. Meloni, P.; Pomata, S.; Raffo, L.; Piscitelli, R. and Pimentel, A.: Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems. In SAMOS XII - 12th International Conference on Embedded Computer Systems, pages 310-317, Samos, Greece, 2012. pdf  doi  BibTeX
  7. Corvino, R. and Gamatié, A.: Abstract clocks for the DSE of data intensive applications on MPSoCs. In M2A2 2012 - 4th IEEE International Workshop on Multicore and Multithreaded Architectures and Algorithms. At ISPA 2012 - 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, pages 729-736, Leganes, Madrid, Spain, 2012. pdf  doi  BibTeX
  8. Pomata, S.; Meloni, P.; Tuveri, G.; Raffo, L. and Lindwer, M.: Exploiting binary translation for fast ASIP design space exploration on FPGAs. In DATE 2012 - Design, Automation & Test in Europe, pages 566-569, 2012. pdf  BibTeX
  9. Diken, E.; Jordans, R.; Corvino, R. and Jóźwiak, L.: Application Analysis Driven ASIP-based System Synthesis for ECG. In Embedded World Conference, pages 1-8, Germany, 2012. pdf  BibTeX

2011

  1. Qiao, P.; Corporaal, H. and Lindwer, M.: A 0.964mW Digital Hearing Aid System. In DATE 2011 - Design, Automation & Test in Europe, pages 1-4, Grenoble, France, 2011. pdf  BibTeX
  2. Corvino, R.; Gamatié, A. and Boulet, P.: Design Space Exploration for Efficient Data Intensive Computing on SoCs. In ICT.OPEN 2011 - The interface for Dutch ICT-Research, Veldhoven, The Netherlands, 2011. poster. pdf  BibTeX
  3. Nery, A. S.; Jóźwiak, L.; Lindwer, M.; Cocco, M.; Nedjah, N. and Franca, F. M. G.: Hardware Reuse in Modern Application-specific Processors and Accelerators. In DSD 2011 - 14th Euromicro Conference on Digital System Design, pages 140-147, IEEE Computer Society Press, Oulu, Finland, 2011. Recieved best paper award. pdf  BibTeX
  4. Diken, E.; Jordans, R.; Corvino, R.; Jóźwiak, L. and Lindwer, M.: Automated architecture synthesis and application mapping for ASIP based adaptable MPSoCs. In ACACES 2011 - 7th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, pages 135-138, Academia Press, Ghent, Belgium, Fiuggi, Italy, 2011. pdf  BibTeX
  5. Jóźwiak, L. and Lindwer, M.: Issues and Challenges in Development of Massively-Parallel Heterogeneous MPSoCs Based on Adaptable ASIPs. In PDP 2011 - 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing, pages 483-487, 2011. pdf  BibTeX

2010

  1. Jóźwiak, L. and Lindwer, M.: Automatic Architecture Synthesis and Application Mapping for Application-specific Customizable MPSoCs. In HOPES 2010 - the First International Workshop on Hands-on Platforms and Tools for Model-based Engineering of Embedded Systems, in the scope of ECMFA 2010 - the Sixth European Conference on Modelling Foundations and Applications, pages 105-110, Paris, France, 2010. pdf  BibTeX

Invited Presentations

2012

  1. Held, I.; Leijten, J. and Lindwer, M.: Parallel Processing for Multi-Comm SoCs; Parallel processing platform HiveLogic migrates hardware to software. Keynote Speach at IWC 2012 - Intel conference. BibTeX
  2. Roorda, J-W.: SAT-based Instruction Scheduling for VLIW-processors with Distributed Register Files. Presentation at HiPEAC 2012 - HiPEAC Compiler, Architecture and Tools Conference. www  BibTeX
  3. Jordans, R.: ASAM: Automatic Architecture Synthesis and Application Mapping. Special session on ongoing European Projects at ASAP 2012 - 23rd IEEE International Conference on Application-specific Systems, Architectures and Processors, July 9-12, 2012, Delft, The Netherlands. www  BibTeX
  4. Lindwer, M.: The Future of Data-parallel Embedded Systems: A paradigm shift for MPSoC research. Keynote Speach at MPSoC 2012 - 12th International Forum on Embedded MPSoC and Multicore, July 9-13, 2012, Québec, Canada. www  BibTeX
  5. Madsen, J.: Mapping known applications onto unknown multicore platforms through probabilistic estimation. Keynote Speach at MPSoC 2012 - 12th International Forum on Embedded MPSoC and Multicore, July 9-13, 2012, Québec, Canada. www  BibTeX
  6. Jóźwiak, L.: Next-generation massively parallel high-performance computing systems for embedded applications. Keynote Speach at MECO 2012 - The 2012 Mediterranean Conference on Embedded Computing. www  BibTeX

2011

  1. Lindwer, M.: The future of data-parallel embedded systems; A paradigm shift for MPCoC research. Invited speaker at ICT.OPEN 2011 - The interface for Dutch ICT-Research, Veldhoven, The Netherlands, 2011. www  BibTeX
  2. Jóźwiak, L.: Advanced Architectures for Highly-demanding Embedded and Pervasive Applications. Keynote Speech, PECCS 2011: The International Conference on Pervasive and Embedded Computing and Communication Systems. www  BibTeX
  3. Jóźwiak, L.: MPSoC Architecture Design for Highly-demanding Embedded Applications. Keynote Speech at the Workshop on Rapid Simulation and Performance Evaluation, in the scope of HiPEAC 2011 - 6th International Conference on High Performance and Embedded Architectures and Compilers. www  BibTeX

Master's Theses

2013

  1. Yang, H.: Computer Aided Design of Cluster-based ASIPs. Master's Thesis, Eindhoven University of Technology, Eindhoven, The Netherlands, 2013. pdf  BibTeX
  2. Pedersen, M. R.: Design and Implementation of Programming Model and Tool-support for Mapping Applications onto Massively Parallel Multi-ASIP Systems. Master's Thesis, Technical University of Denmark, Kongens Lyngby, Denmark, 2013. BibTeX

2012

  1. Westen, P.: Simdization transformation strategies. Master's Thesis, TU Delft, Delft, The Netherlands, 2012. pdf  BibTeX

2011

  1. Ökmen, Y.: SIMD Floating Point Processor and Efficient Implementation of Ray Tracing Algorithm. Master's Thesis, TU Delft, Delft, The Netherlands, 2011. pdf  BibTeX

Misc

2013

  1. Jóźwiak, L. and Madsen, J.: Quality-driven model-based design of multi-processor embedded systems for highly-demanding applications. Lecture in ECyPS-SS 2013 - Summer school on Embedded and Cyber-Physical Systems. www  BibTeX

2011

  1. Jóźwiak, L.; Lindwer, M. and Madsen, J.: Model-based MPSoC Architecture Synthesis for Highly-demanding Embedded Applications. DATE 2011 Tutorial presentation. pdf  www  BibTeX

2010

  1. Madsen, J.: ASAM: Automatic Architecture Synthesis and Application Mapping. DTU Presentation Series. BibTeX
  2. Jóźwiak, L. and Lindwer, M.: Issues and Challenges of Architecture Synthesis and Application Mapping for Heterogeneous MPSoCs Based on Adaptable ASIPs. Presentation at Scenario-driven Design Workshop, Eindhoven University of Technology. BibTeX

Technical Reports

2012

  1. Lindwer, M. and Norarangelo, G.: Flow integration, verification, and acceptance requirements. Deliverable 1.3, ASAM Project, May, 2012. pdf  BibTeX
  2. Notarangelo, G. and Guidetti, E.: Final report on use-case implementation. Deliverable 6.3, ASAM Project, May, 2012. pdf  BibTeX

2011

  1. Micconi, L.; Madsen, J. and Boesen, M. R.: Method of and report on system analysis. Deliverable 2.3, ASAM Project, November, 2011. pdf  BibTeX
  2. Lindwer, M.; Cocco, M.; Corvino, R.; Jordans, R.; Jóźwiak, L.; Madsen, J.; Meloni, P.; Raffo, L.; Notarangelo, G. and Kienhuis, B.: Design Methodology Overview and Flow Specification. Deliverable 1.2, ASAM Project, May, 2011. pdf  BibTeX
  3. Micconi, L.; Madsen, J.; Pop, P.; Kienhuis, B.; Corvino, R. and Jóźwiak, L.: Report on initial version of the hierarchical application model. Deliverable 2.2, ASAM Project, May, 2011. pdf  BibTeX
  4. Diken, E.; Jóźwiak, L.; Corvino, R. and Jordans, R.: Application analysis/profiling and parallelization. Deliverable 3.1, ASAM Project, May, 2011. pdf  BibTeX
  5. Corvino, R.; Diken, E.; Jordans, R. and Jóźwiak, L.: Application-specific instruction identification and selection for ASIP. Deliverable 3.2, ASAM Project, May, 2011. pdf  BibTeX
  6. Meloni, P., et al.: Method of and report on interconnects and memory structures construction. Deliverable 3.4, ASAM Project, May, 2011. pdf  BibTeX
  7. Lindwer, M. and Diken, E.: Specification of architecture-driven code transformations. Deliverable 5.1, ASAM Project, May, 2011. pdf  BibTeX
  8. Micconi, L.; Iordache, G.; Madsen, J.; Pop, P.; Meloni, P.; Lindwer, M.; Cocco, M.; Notarangelo, G. and Guidetti, E.: Initial version of generic platform model. Deliverable 2.1, ASAM Project, January, 2011. pdf  BibTeX

2010

  1. Lindwer, M.; Jóźwiak, L.; Madsen, J.; Kienhuis, B.; Meloni, P.; Raffo, L. and Notarangelo, G.: Initial design methodology, flow, and tool requirements. Deliverable 1.1, ASAM Project, November, 2010. pdf  BibTeX
  2. Meloni, P.; Raffo, L.; Lindwer, M.; Jóźwiak, L. and Berekovic, M.: Implementation and prototyping infrastructure. Deliverable 4.1, ASAM Project, November, 2010. pdf  BibTeX
  3. Guidetti, E.; Notarangelo, G.; Lindwer, M. and Jóźwiak, L.: Definition of requirements, industrial use-cases and evaluation strategy. Deliverable 6.1, ASAM Project, November, 2010. pdf  BibTeX